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ts9002 page 1 ? 2012 touchstone semiconductor, inc. all rights reserved. features ? ultra - low quiescent current : 4a (max), both comparators plus reference ? single or dual power supplies: single : +2.5v to +11v dual : 1.25v to 5.5v ? input voltage range includes negative supply ? 7 s propagation delay ? push - pull ttl/cmos - compatible outputs ? crowbar - current - free switching ? continuous source current capability: 40ma ? internal 1.182v 0.75 % reference ? adjustable hysteresis ? 8 - pin msop package applications threshold detectors window comparator level translators oscillator circuits battery - powered systems description the ts9002 low - voltage, micropower dual analog comparator is form - factor identical to the max923 analog comparator with improved electrical spe cifications. ideal for 3v or 5v single - supply applications, the ts9002 draws 11% lower supply current with a 25% - better initial accuracy reference voltage. the ts002 joins touchstones ts9001 - 1/2 analog comparators in the nanowatt analog? high performan ce analog integrated circuits portfolio. the ts9002 can operate from single +2.5v to +11v supplies or from 1.25v to 5 .5 v dual supplies. the ts9002 exhibits an input voltage range from the negative supply rail to within 1.3v of the positive supply rail . in addition, its push - pull output stage is ttl/cmos compatible and capable of sinking and sourcing current. it also incorporates an internal 1. 182v 0.75 % voltage reference. without complicated feedback configurations and only requiring two additional res istors, adding external hysteresis via a separate pin is available on the ts002s yst pin the ts9002 is fully specified over the - 40oc to +85oc temperature range and is available in a 8 - pin msop package. low - power single/dual - supply dual comparator with reference typical application circuit a 5v, low - parts - count, high - accuracy window detector t he touchstone semicondu c tor logo is a registered trademark of touchstone semiconductor, incorporated.
ts9002 page 2 ts9002ds r1p0 rtfds absolute maximum ratings supply voltage ( v+ to v - , v+ to gnd, gnd to v - )... ... - 0.3v, +12v voltage inputs (in+, in - ) ... .......................... .......... . ..... . ( v+ + 0.3v) to (v - - 0.3v) yst(ref + 5 v) to (v - - 0.3v) output voltage ref ............................ ................... . ..... (v+ + 0.3v) to (v - - 0.3v) out .......... ..... . ..................... ............ ...( v+ + 0.3v ) to (v - - 0.3v) input current (in+, in - , hyst ). ............. . ..... ....... ....... . ....... .. .. .20ma continuous power dissipation (t a = +70c) 8 - pin msop (d erate 4.1 mw/c above +70c) ... .. ......... ..330 mw operating temperature ranges ......................... ..... - 40c to +85c storage temperature range ........................ ..... ... - 65c to +150c lead temperature (soldering, 10s) ..................... ..... ...........+300c output current ref20ma out .4 0ma output short - circuit duration (v+ 55v) ........ ..... continuous electrical and thermal s tresses beyond those listed under absolute maximum ratings may cause permanent damage to the device these are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. exposure to any absolute maximum rating conditions for extended periods may affect device reliab ility and lifetime . package/ordering information order number part marking carrier quantity ts9 002im8 tp tad g tube 50 ts 9 002im8 t tape & reel 2500 lead - free program: touchstone semico nductor supplies only lead - free packaging. consult touchstone semiconductor for products specified with wider operating temperature ranges.
ts9002 ts9002ds r1p0 page 3 rtfds electrical characteristics C 5v operation v+ = 5v, v - = gnd = 0v; t a = - 40oc to +85oc, unless otherwise noted. typical values are at t a = +25oc. see note 1. paramet er conditions min typ max units power requirements supply voltage range 2.5 11 v supply current in+ = in - + 100mv hyst = ref t a = +25c 2. 6 4 a - 40c to +85c 5 .2 comparator input offset voltage v cm = 2.5v t a = +25c 3.5 mv - 40c to +85c 10 input leakage current (in - , in+) in+ = in - = 2.5v t a = +25c 0.01 2 na - 40c to +85c 0.01 5 na input leakage current (hyst ) t a = +25c 0.02 na - 40c to +85c 0.02 na input common - mode voltage range v - v+ C 1.3v v common - mode rejection ratio v - to (v+ C 1.3v) 0.1 1 mv/v power - supply rejection ratio v+ = 2.5v to 11v 0.1 1 mv/v output voltage noise 100hz to 100khz 20 v rms hysteresis input voltage range ref - 0.05v ref v response time (high - to - low transition) t a = +25c, 100pf load overdrive = 10 mv 17 s overdrive = 100 mv 7 response time (low - to - high transition) t a = +25c, 100pf load overdrive = 10 mv 17 s overdrive = 100 mv 7 output high voltage - 40c to +85c ; i out = 17 ma v+ C 0.4 v output low voltage - 40c to +85c ; i out = 1.8ma gnd + 0.4 v dual supply - 40c to +85c ; i out = 1.8ma v - + 0.4 v reference reference voltage t a = +25c 1.173 1.182 1.191 v - 40c to +85c 1.164 1.199 reference line regulation 25v (v+ - v - ) 11v t a = +25c 0.25 mv/v source current vref = 1% t a = +25c 20 25 a - 40c to +85c 6 sink current vref = 1% t a = +25c 10 15 a - 40c to +85c 4 output voltage noise 100hz to 100khz 100 v rms
ts9002 page 4 ts9002ds r1p0 rtfds electrical characteristics C 3v operation v+ = 3v, v - = gnd = 0v ; t a = - 40oc to +85oc, unless otherwise noted. typical values are at t a = +25oc. see note 1. parameter conditions min typ max units power requirements supply current in+ = in - + 100mv hyst = ref t a = +25c 2 3 .8 a - 40c to +85c 5.3 comparator input offset voltage v cm = 1.5v t a = +25c 3.5 mv - 40c to +85c 10 input leakage current (in - , in+) in+ = in - = 1.5v t a = +25c 0.01 2 na - 40c to +85c 0.01 5 na input leakage current ( at hyst pin ) t a = +25c 0.02 na - 40c to +85c 0.02 na input common - mode voltage range v - v+ C C v rms hysteresis input voltage range ref - 0.05v ref v response time (high - to - low transition) t a = +25c, 100pf load overdrive = 10 mv 17 s a = +25c, 100pf load overdrive = 10 mv 17 s out = 10 ma v+ C out = 1.8ma gnd + 0.4 v dual supply - 40c to +85c ; i out = 1.8ma v - + 0.4 v reference reference voltage t a = +25c 1.173 1.182 1.191 v - 40c to +85c 1.164 1.199 reference line regulation 25v (v+ ) 5v a = +25c 0.25 mv/v source current a = +25c 20 25 a a = +25c 10 15 a v rms note 1 : all specifications are 100% tested at t a = +25c. specification limits over temperature (t a = t min to t max ) are guaranteed by device characterization, not production tested.
ts9002 ts9002ds r1p0 page 5 rtfds typical performance characteristics v + = 5v; v - = gnd ; t a = +25c , unless otherwise noted. load current - ma v ol - v 4 8 1 0 output voltage low vs load current 0 12 1.5 2 0.5 16 load current - a reference voltage - v 5 10 1.165 1.155 1.180 reference output voltage vs output load current 0 15 1.170 1.175 1.160 20 temperature - oc reference voltage - v reference voltage vs temperature load current - ma v oh - v 10 20 2 1.5 output voltage high vs load current 0 30 2.5 40 50 3 3.5 v+ = 3v v+ = 5v sink 20 2.5 4 4.5 5 v+ = 3v v+ = 5v 25 30 1.190 1.185 source v+ = 3v or 5v - 15 10 - 40 35 60 85 1.16 1.14 1.19 1.17 1.18 1.15 1.21 1.20 1.22 24 28 temperature - oc supply current - a supply current vs temperature - 15 10 - 40 35 60 85 3 2 3.5 4 2.5 4.5 1.5 v+ = 5v, v - = 0v v+ = 3v, v - = 0v v ref - v hyst - mv in+ - in - - mv - 40 - 80 hysteresis control - 20 0 - 60 10 20 0 30 40 output high 50 60 20 80 40 output low no change
ts9002 page 6 ts9002ds r1p0 rtfds typical performance characte ristics v + = 5v; v - = gnd ; t a = +25c , unless otherwise noted. load capacitance - nf response time - s response time vs load capacitance 20 40 0 60 80 v - = 0v 100 6 2 8 10 4 12 14 16 18 v ohl v olh response time - s output voltage - v 0 2 0 0 response time for various input overdrives (low - to - high) - 2 4 1 2 100 0 6 response time - s 10mv 20mv 50mv input voltage - v 8 5 3 4 100mv 10 12 14 16 18 20 total supply voltage - v source current - ma short - circuit source current vs supply voltage total supply voltage - v sink current - ma 23 20 short - circuit sink current vs supply voltage 21 4.5 6.5 2 .5 gnd connected to v - 100 60 120 1 40 80 160 out connected to v - out connected to v+ 8.5 10 22 response time for various input overdrives (high - to - low) output voltage - v input voltage - v 10mv 20mv 50mv 100mv 0 0 1 2 100 5 3 4 0 2 - 2 4 6 8 10 12 14 16 18 2.5 3 3.5 4 4.5 5 5.5 180 200
ts9002 ts9002ds r1p0 page 7 rtfds pin f unctions block diagram theory of operation the ts 9002 dual , low - voltage , micropower analog comparator provide s excellent flexibility and performance while sourcing continuously up to 40ma of current. the ts9002 draws less than 5.5 a ( total) over temperature for both comparators, including the reference. it also exhibits an input offset voltage of 3.5 mv, and has an on - board + 1.182v 0.75 % voltage reference . to minimize glitches that can occur with parasitic feedback or a less than optimal board layout, the design of the ts9002 output stage is optimized to eliminate crowbar glitches as the output switch es. to minimize current consumption while providing flexibility, ts9002 has an on - board hyst pin in ord er to add additional hysteresis. power - supply and input signal ranges the ts 9002 can operate from a single supply voltage range of +2.5v to +11v, provide s a wide common mode input voltage range of v - to v+ - 1.3v, and accept s input signals ranging from v - to v+ - 1v. the inputs can accept an input as much as 300mv above and below the power supply ra ils without damage to the part. t he ts 9002 i s ttl compatible with a single +5v supply. comparator output the output design of the ts9002 can source and sink more than 40ma and 5ma, respectively, while simultaneously maintaining a quiescent current less ts9002 name function msop - 8 1 outa comparator a output. sinks and sources current. swings from v+ to v - . 2 v - negative supply voltage . connect to ground for single - supply operation. 3 ina+ comparator a noninverting input 4 inb - comparator b inverting input 5 hyst hysteresis input. connect to ref if not used. input voltage range is from vref to (vref - 50mv). 6 ref 1.182v reference output with respect to v - . 7 v+ positive supply voltage 8 outb comparator b output. sinks and sources current. swings from v+ to v - .
ts9002 page 8 ts9002ds r1p0 rtfds than 3a . if the power dissipation of the package is maintained within the max limit, the output can source pulses of 100ma of current with v+ set to +5v. in an effort to m inimize external components needed to address power supply feedback, the ts9002 output does not produce crowbar switching current as the output switches. at a power supply voltage of 3v, the propagation delay of the ts9002 is 6 s when the output switches from high - to - low and low - to - high . voltage reference the ts9002 has an on - board + 1.182v voltage reference with an accuracy of 0.75 %. the ref pin is able to source and sink 20a and 10 a of current, respectively. the ref pin is referenced to v - and it should not be bypassed. noise considerations noise can play a role in the overall performance of the ts 9002 . despite having a large gain, if the input voltage is near or equal to the input offset voltage, the output will randomly switch high and low. as a result, the ts 9002 produces a peak - to - peak noise of about 0.3mv pp w hile the reference voltage produces a peak - to - peak noise of about 1mv pp . furthermore , it is important to design a layout that minimizes capacitive coupling from a given output to the reference pin as crosstalk can add noise and as a result, degrade perfo rmance. applications information hysteresis as a result of circuit noise or unintended parasitic feedback, many analog comparators often break into oscillation within their linear region of operation especially when the applied differential input voltage approaches 0v (zero volt). externally - introduced hysteresis is a wel l - established technique to stabilizing analog comparator behavior and requires external components. as shown in figure 1 , adding comparator hysteresis creates two trip points: v thr (for the rising input voltage) and v thf (for the falling input voltage). th e hysteresis band (v hb ) is defined as the voltage difference between the two trip points. when a comparators input voltages are equal, hysteresis effectively forces one comparator input to move quickly past the other input, moving the input out of the region where oscillation occurs. figure 1 illustrates the case in which an in - input is a fixed voltage and an in+ is varied. if the inpu t signals were reversed, the f igure would be the same with an inverted output. hysteresis can be generated with two ext ernal resistors using positive feedback as shown in figure 2 . resistor r1 is connected between ref and hyst and r2 is connected between hyst and v - . this will increase the trip point for the rising input voltage, v thr , and decrease the trip point for the f alling input voltage, v thf , by the same amount. if no hysteres is is required, connect hyst to ref. the hysteresis band, v hb , is voltage across the ref and hyst pin multiplied by a factor of 2. the hyst pin can accept a voltage between ref and ref - 50mv, where a voltage of ref - 50mv generates the maximum voltage across r1 and thus, the maximum hysteresis and hysteresis band of 50mv and 100mv, respectively. to design the circuit for a desired hyster esis band, consider the equations below to acquire the values for resistors r1 and r2: figure 1. threshold hysteresis band figure 2. programming the hyst pin
ts9002 ts9002ds r1p0 page 9 rtfds r 1 v b 2 x ref r 2 1 12 v b 2 ref where i ref is the primary source of current out of the reference pin and should be maintained within the maximum current the reference can source . it is safe to maintain the current within 20a. it is also important to ensure that the current from reference is much larger than the hyst pin input current. given r2 = 2.4 m , the current sourced by the reference is 0.5 a . this allows the hysteresis band and r1 to be approximated as follows: r1(k) v hb (mv) note the hysteresis is the same for both comparators. board layout and bypassing while power - s upply bypass capacitors are not typically required, it is good engineering practice to use 01f bypass capacitors close to the devices power su pply pins when the power supply impedance is high, t he power supply leads are long, or there is exce ssive noise on the power supply traces. to reduce str ay capacitance, it is also good engineering practice to make signal trace lengths as short as possible . also recommended are a ground plane and surface mount resistors and capacitors. window detector the schematic shown in figure 3 is for a 4.5 v undervoltage threshold detector and a 5.5v overvoltage threshold detector using the ts 9002 . resistor components r1, r2, and r3 can be selected based on the threshold voltage desired while resistors r4 and r5 can be selected based on the hysteresis desire d. adding hysteresis to the circuit will minimize chattering on the output when the input voltage is close to the trip point. outa and outb generate the active low undervoltage indication and active - low overvoltage indication, respectively. if both outa and outb signals are anded together, the resulting output of the and gate is an active - high, power - good signal. to design the circuit , the following procedure needs to be followed : 1. as described below, determine the desired hysteresis and select resistors r4 and r5 accordingly. this circuit has 5mv of hysteresis at the input where the input voltage v in will appear larger due to the in put resistor divider. 2. c hoosing r1. as the leakage current at the inb - pin is less than 1na, the current through r1 should be at least 100na to minimize offset voltage errors caused by the input leakage current values within 100k and 1m are recommended in this example, a 24k, 1% standard value resistor is selected for r1. 3. calculat ing r2 + r3. as the input voltage v in rises, the overvoltage threshold should be 5.5v. choose r2 + r3 as follows: r 1 + r r 1 x v ot v ref + v ys 1 24 k x 5 5 v 1 12 v + 5 mv 1 1 0 m 4. calculating r2. as the input voltage v in falls, the undervoltage threshold should be 4.5v. choose r2 as follows: r 2 ( r 1 + r 2 + r ) x v ref v ys v ut 24 k ( 24 k + 1 0 m ) x 1 12 v 5 mv 4 5 24 k 2 2 k figure 3. window detector
ts9002 page 10 ts9002ds r1p0 rtfds in this example, a 1k, 1% standard value resistor is selected for r2. 5. calculat ing r3. r ( r 2 + r ) r 2 1 0 m C 1 k 1 00 m in this example, a 1m, 1% standard value resistor is selected for r3. 6. using the equations below, verify all resistor values selected: v ot ( v ref + v ys ) x r 1 + r 2 + r r 1 = 5.474v v ot ( v ref v ys ) x r 1 + r 2 + r ( r 1 + r 2 ) 4 44 v where the hysteresis voltage is given by: v ys v ref x r 5 r 4
ts9002 touchstone semiconductor, inc. page 11 630 alder drive, milpitas, ca 95035 ts9002ds r1p0 +1 (408) 215 - 1220 ? www.touchstonesemi.com rtfds package outline draw ing 8 - pin msop package outline drawing (n.b., drawings are not to scale) information furnished by touchstone semiconductor is believed to be accurate and reliable. however, touchstone semiconductor does not assume any responsibility for its use nor for any infringements of patents or other rights of thir d parties that may result from its use , and all information provided by touchstone semiconductor and its suppliers is provided on an as is basis, without warranty of any kin d . touchstone semiconductor reserves the right to change product specifications and product descriptions at any time without any advance notice. no license is granted by implication or otherwise under any patent or patent rights of touchstone semiconductor. touchstone semiconductor assumes no liability for applications assistance or cust omer product design. customers are responsible for their products and applications using touchstone semiconductor components. to minimize the risk associated with customer products and applicatio ns, customers should provide adequate design and operating sa feguards. trademarks and registered trademarks are the property of their respective owners. 0 . 6 5 r e f 3 . 1 0 m a x 2 . 9 0 m i n 0 . 9 5 m a x 0 . 7 5 m i n 0 . 1 5 m a x 0 . 0 5 m i n s e a t i n g p l a n e 5 . 0 8 m a x 4 . 6 7 m i n 3 . 1 0 m a x 2 . 9 0 m i n 0 ' - - 6 ' d e t i l d e t i l 0 . 2 5 0 . 7 0 m a x 0 . 4 0 m i n 0 . 2 3 m a x 0 . 1 3 m i n n o t e : 1 . p a c k a g e l e n g t h d o e s n o t i n c l u d e m o l d f l a s h , p r o t r u s i o n s o r g a t e b u r r s . 2 . p a c k a g e w i d t h d o e s n o t i n c l u d e i n t e r l e a d f l a s h o r p r o t u s i o n s . 3 . c o n t r o l l i n g d i m e n s i o n i n m i l i m e t e r s . 4 . t h i s p a r t i s c o m p l i a n t w i t h j e d e c m o - 1 8 7 v a r i a t i o n s a a 5 . l e a d s p a n / s t a n d o f f h e i g h t / c o p l a n a r i t y a r e c o n s i d e r e d a s s p e c i a l c h a r a c t e r i s t i c . 1 2 8 0 . 3 8 m a x 0 . 2 8 m i n 0 . 1 0 m a x g a u g e p l a n e 1 . 1 0 m a x 0 . 2 7 r e f 0 . 1 2 7 0 . 2 3 m a x 0 . 1 3 m i n 0 . 3 8 m a x 0 . 2 8 m i n

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